Doctoraal voorlichting 2002 Andy Pimentel Computer Architectuur & Parallelle Systemen groep Een globaal overzicht Groepsleider: Prof. Dr L.O. Hertzberger Het onderzoek concentreert zich op computer architectuur als integraal concept, wat inhoudt dat applicatie, compiler, OS en hardware in het geheel worden beschouwd Op dit moment 5 onderzoeksthema’s Computer architectuur modellering en simulatie Grid computing Federated databases Traffic applications Advanced Internet technology Architectuur modellering en simulatie Verantwoordelijk docent: dr. A.D. Pimentel ([email protected]) Het ontwerp van methoden en technieken voor computer architectuur simulatie Enkele trefwoorden voor dit onderzoek: Modellerings methodology Abstractie niveau(s) Experimentatie Validatie Mixed-level simulatie Nauwe samenwerking met: Philips Research, Universiteit Leiden en TU Delft Later meer... Grid Computing Verantwoordelijk docent: dr. A. Belloum ([email protected]) Prestatie analyse tests op een Grid testbed, (grafische) user interfaces voor Grid gebruikers en de ontwikkeling van een collaboratief systeem voor grid-gebaseerde applicaties Enkele trefwoorden voor dit onderzoek: Grid technology Human-computer interaction Scheduling voor Grid systemen Collaboratieve systemen Samenwerking met: Nikhef, SARA, Amolf URL: VLABWWW.nikhef.nl/VLAM-G/ Federated databases Verantwoordelijk docent: dr. H. Afsarmanesh ([email protected]) Ontwerp en ontwikkeling van software architecturen die “inter-operability” en integratie van cooperatieve informatie systemen ondersteunen Enkele trefwoorden voor dit onderzoek: Interoperable en cooperatieve informatie systemen Informatie en service brokerage Integratie van bestaande multi-databases High-performance webserver / database integratie Samenwerking met: o.a. AMC,Unilever, Nikhef URL: www.science.uva.nl/~netpeer/ Traffic applications Verantwoordelijk docent: drs. A. Visser ([email protected]) Onderzoek naar onderwerpen gerelateerd aan mobiliteit: de operationele architectuur van de mobiele robot MARIE, modellering en analyse van sensor systemen langs wegen Enkele trefwoorden voor dit onderzoek: Toegepast onderzoek Mobiliteit Embodied computer systemen URL: www.science.uva.nl/~arnoud/research/ + www.science.uva.nl/~arnoud/projects/ Advanced Internet Technology Verantwoordelijk docent: dr. C. de Laat ([email protected]) Onderzoek naar het Next Generation Internet en grid-enabling technologie Enkele trefwoorden voor dit onderzoek: Optische netwerken voor Grid applicaties Autenticatie, autorisatie en accounting (AAA) modellering Intelligente netwerk devices Optimalisatie, meten, monitoren, geavanceerde protocol stacks (voor high-bandwidth connecties over lange afstanden) URL: www.science.uva.nl/~delaat/ Een greep uit de beschikbare afstudeer projecten Traffic simulation of vehicles with a shape Reserveringsrijden: het beter benutten van de weg door het reserveren van ruimte Stream data prefetching for (multimedia) processors Validation of abstract architecture models of embedded media systems Integrating the SimpleScalar simulator into Sesame Predicting the impact of large public events on congestion Optical networking for Grid applications Vakkenpakket Verplicht Advanced Computer Architecture (7 ptn, 10 ECTS) voorheen Architectuur-compiler interactie Embedded Systems (7 ptn, 10 ECTS) Verplicht 7 ptn uit volgende vakken Ontwerp en organisatie van autonome systemen (7 ptn, 10 ECTS) Parallel wetenschappelijk rekenen en simulatie (7 ptn, 10 ECTS) Databases en webgebaseerde toepassingen (7 ptn, 10 ECTS) Aangeraden O.a. Computernetwerken en gespreide systemen (beide VU) Perspectieven IT industrie b.v. KPN, ACE, Philips, CMG, OCE, Ericson, Getronics, etc. Onderzoeksinstituten zoals NLR en TNO Banken Freelance, eigen bedrijf Onderwijs, Universiteiten, Overheid A bit more on research in my group (computer architecture modeling and simulation) Trends in embedded system design Observations Modern embedded systems for media and signal processing must support multiple applications and various standards for which they often should provide real-time performance These systems increasingly have heterogeneous system architectures, integrating dedicated hardware embedded processor cores reconfigurable Increasing components (e.g. FPGAs) silicon budgets Integration of functions: Systems on Chip Complexity of system design is increasing “Jumping down” the design pyramid High Specification Low Abstraction Abstract executable models Cycle-true simulation models Effort Back-of-the-envelope calculations 10000 lines Mins/ hours Synthesizable RTL models 10000+ lines Hours/ days Low High Alternative realizations Design by stepwise refinement High Specification Explore Low Back-of-the-envelope calculations 1000 lines Effort Abstraction Abstract executable models Cycle-true simulation models Secs/ minutes 10000 lines Mins/ hours Synthesizable RTL models 10000+ lines Hours/ days Low High Alternative realizations The Artemis architecture simulation environment Performance evaluation of instantiations of embedded systems architectures Including different application-architecture mappings: which component does what? HW/SW partitionings: which application task(s) is/are performed in SW and which one(s) in HW? At multiple levels of abstraction For a broad range of multi-media applications We target the early design stages Quick and flexible model construction Easy re-use of models and model components (e.g., library approach) Fast simulations (large design space) Y-chart Based Methodology Applications Architecture Mapping Performance Analysis Performance Numbers Use separate models for application and architecture behavior Modeling and simulation methodology Application model Description of functional behavior of application Independent from architecture, HW/SW partitioning and timing characteristics Generates application events representing the workload imposed on the architecture Traces of application events Architecture model Parameterized timing behaviour of architecture components Models timing consequences of application events Application model Architecture model Explicit mapping of application and architecture models Trace-driven co-simulation Easy reuse of both application and architecture models! Application modeling Applying the Kahn process networks model of computation Parallel processes communicating with each other via unbounded FIFO channels expresses parallelism in an application and makes communication explicit Generation of application events: Code is instrumented with annotations describing computational actions Reading from/writing to Kahn channels represent communication behavior Application events can be very coarse grain like “compute a matrix multiplication” or ”read/write a pixel block” Mapping the application model Event queues are used for mapping the appl. event traces two or more event queues to one architecture component is possible: events are scheduled Kahn process Channel Application model Mapping Kahn channels are mapped to communication components at architecture level Event queue Proc. core FIFO buffer Proc. core Architecture model Bus Architecture modeling Construct architecture models from generic building blocks (library approach) Library contains performance models for common architecture components processing cores, communication media (like buses), memories, etc. Accounting for functional behavior not necessary! Architecture modeling starts at “black-box”level Processing cores can model timing behavior of SW, HW or reconfigurable execution parameterizable latencies for the application events SW execution: high latency, HW execution: low latency Allows for rapidly evaluating different HW/SW partitionings! Tot slot... Http://www.science.uva.nl/research/arch/ (groeps info) Http://www.science.uva.nl/research/graduate/ (afstudeer info) Http://www.science.uva.nl/~andy/ (computer arch. simulatie) Http://ce.et.tudelft.nl/artemis/ (Artemis project homepage) Email [email protected] (of de desbetreffende docent) voor verdere informatie