Control Architecture of a Wafer Stepper

Control Architecture of a waferstepper
Gerrit Muller
11-3-1999
Eindhoven
Themadag embedded systemen,
de keuze tussen software en hardware implementatie
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Gerrit Muller
The Market
1997
semiconductor sales
by end-user market
GDP
33.4 T$
2002
39.4 T$
3%
non PC
computing
PC’s
32%
consumer
electronics
16%
IC’s
communications
17%
memory
18%
other
applications
electronic
sales
17%
other
semiconductors
3%
902.4G$ 1284.2G$
17%
semiconductor
151.7G$
sales
26%
330.6G$
15%
Equipment
sales
equipment
steppers
ASML
sales 1997:
net income:
1.8 Gfl
0.3 Gfl
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Steppers
22.3G$
13%
42.8G$
16%
17%
3.6G$
7.3G$
source: Dataquest, ING Barings research
www.asml.com
Gerrit Muller
Market fluctuations
The semiconductor equipment market shows large fluctuations.
1995
units
177
net sales Mfl 918
net profit Mfl 131
1996
1997
1998
205
211
1331 1803
218
329
162
1717
137
Logistic and manufacturing flexibility is a must.
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What is a waferstepper?
Lightsource
Mask (Reticle)
Lens
Die
Wafer
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Gerrit Muller
Step & Scan technology
reticle
Scanning
fieldsize
Slit
Lens
Lens
wafer
250 mm/s
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Stepping
fieldsize
Main specifications
Imaging
Overlay
linewidth: 180 nm (1999)
AA (single machine) 40 nm
BC (matched)
60 nm
critical dimension control
For comparison:
Wafer diameter 200 mm
Die size ca.: 20*20 mm2
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Productivity
96 Wafers per hour
Moore’s law (or challenge?)
SIA
97
98
1994
roadmap
99
00
01
250
02
03
04
180
250
180
150
130
1998
revision
250
180
150
125
1999
proposal
250
180
130
90
180
130
06
130
1997
roadmap
leading
250
edge
customers
05
100
linewidth in nm.
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2 kHz laser
Quadrupole
ATHENA/TIS
Product roadmap
T1100 193 nm scanner
Atlas 300 mm body
S400 I-line scanner
S700 DUV scanner
T400 I-line scanner
T700 DUV scanner
/900 193 nm scanner
5500 scanner body
/400 i-line scanner
/500 DUV scanner
/300C DUV stepper
/700 DUV scanner
/300D
5500 stepper body
/250C i-line stepper
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Modular subsystems
illuminator
reticle
handling
light source
reticle stage
measurement
lens
UI
console
wafer
handling
wafer stage
base frame
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contamination
and
temperature
control
electronics
cabinets
Control architecture requirements
• The system can be operated from the operator console or remote
• Machine performance is determined by the hardware potential, the control
architecture is never a limiting factor
• Modules must be independent from manufacturing and logistics point of view, they
provide local:
• calibration
• qualification
• safety
• diagnostics
• Reliable and Robust
• Support for localized small improvements (“patches”)
• Life cycle support for 10 years
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Generic block diagram
console
remote
Sun workstation
UNIX
Internal network (ethernet)
VME
VxWorks
VME
VxWorks
VME
VxWorks
VME
VxWorks
VME
VxWorks
VME
High speed
serial link
DSP based
control
DSP based
control
DSP based
control
Position Data bus
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Sun Workstation
• User interface
• Interface to Rest Of World
• Persistent storage of recipes, machine constants, monitoring and logging data
• Translation of recipes in subsystem activities
• High level control (batch control, image quality control)
• System set up, qualification and diagnostics software
• Downloading of VME/VxWorks subsystems
• Never in performance or time critical path (currently not 100% realized, high level control
is sometimes limiting)
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Interface management
• Major release change if interface(s) change
• Patches are possible if no interface is changed
• New products on the basis of a major release, consolidation in the next major release
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VME/VxWorks time critical controls
• Older systems 68k based, newer systems PowerPC based
• Process communication via abstraction layer
• Communication about subsystem capabilities by “negotiation”
• Subsystem synchronization on the basis of a “slow” 4 kHz master clock
• Low overheads because of Real time executive (VxWorks)
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DSP, number crunching
• DSP boards named after first function: Motion controller
• Re-use for all number crunching intensive applications
• I/O via proprietary Position Data bus and/or High Speed Serial Link
• Next generation systems will use PowerPC as signal processor
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The analog part
The power of the digital control system is entirely determined by the quality of its input.
Every measurement system must be designed to obtain a clear (robust, low noise, well defined)
signal.
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Align
ment
Scan & Expose control
WS control
LS control
WS
Interferometer actuators
x, y, Rz
x, y, Rz
Level
sensor
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WS
actuators
z, Rx, Ry
Gerrit Muller
Align
sensor
Summary ASML development strategy
• Concurrent engineering
• short development cycle time
• Networking
• market
• technology base
• flexibility
• System engineering
• modularity
• short integration
• Family concept
• upgradeability
• follow SIA roadmap
• reuse, risk reduction over generations
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